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 CBTD3861
10-bit level shifting bus switch with output enable
Rev. 1 -- 19 August 2010 Product data sheet
1. General description
The CBTD3861 provides ten bits of high-speed TTL-compatible bus switching. The low ON resistance of the switch allows connections to be made with minimal propagation delay. The CBTD3861 device is organized as one 10-bit bus switches with one output enable (OE) input. When OE is LOW, the switch is on and port A is connected to the B port. When OE is HIGH, each switch is disabled. The CBTD3861 is characterized for operation from -40 C to +85 C.
2. Features and benefits
Designed to be used in 5 V to 3.3 V level shifting applications with internal diode 5 switch connection between two ports TTL-compatible control input levels Multiple package options Latch-up protection exceeds 100 mA per JESD78 ESD protection: HBM JESD22-A114F exceeds 2000 V CDM JESD22-C101C exceeds 1000 V
3. Ordering information
Table 1. Ordering information Package Temperature range CBTD3861PW -40 C to +85 C CBTD3861DK -40 C to +85 C Name TSSOP24 SSOP24[1] Description plastic thin shrink small outline package; 24 leads; body width 4.4 mm plastic shrink small outline package; 24 leads; body width 3.9 mm; lead pitch 0.635 mm Version SOT355-1 SOT556-1 SOT815-1 Type number
CBTD3861BQ -40 C to +85 C
DHVQFN24 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 24 terminals; body 3.5 x 5.5 x 0.85 mm
[1]
Also known as QSOP24 package
NXP Semiconductors
CBTD3861
10-bit level shifting bus switch with output enable
4. Functional diagram
2 22
A1
B1
A10 OE
11 23
13
B10
001aam471
Fig 1.
Logic diagram
5. Pinning information
5.1 Pinning
CBTD3861
n.c. A1 A2 A3 A4 A5 A6 A7 A8 1 2 3 4 5 6 7 8 9 24 VCC 23 OE 22 B1 21 B2 20 B3 19 B4 18 B5 17 B6 16 B7 15 B8 14 B9 13 B10
001aam477
CBTD3861
n.c. A1 A2 A3 A4 A5 A6 A7 A8 1 2 3 4 5 6 7 8 9 24 VCC 23 OE 22 B1 21 B2 20 B3 19 B4 18 B5 17 B6 16 B7 15 B8 14 B9 13 B10
001aam478
A9 10 A10 11 GND 12
A9 10 A10 11 GND 12
Fig 2.
Pin configuration for TSSOP24 (SOT355-1)
Fig 3.
Pin configuration for SSOP24 (SOT556-1)
CBTD3861
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(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 1 -- 19 August 2010
2 of 16
NXP Semiconductors
CBTD3861
10-bit level shifting bus switch with output enable
CBTD3861
terminal 1 index area A1 A2 A3 A4 A5 A6 A7 A8 2 3 4 5 6 7 8 9 GND(1) GND 12 B10 13 24 VCC 23 OE 22 B1 21 B2 20 B3 19 B4 18 B5 17 B6 16 B7 15 B8 14 B9 n.c. 1 A9 10 A10 11
001aam479
Transparent top view
(1) The die substrate is attached to this pad using conductive die attach material. It can not be used as supply pin or input.
Fig 4.
Pin configuration for DHVQFN24 (SOT815-1)
5.2 Pin description
Table 2. Symbol n.c. A1 to A10 GND B1 to B10 OE VCC Pin description Pin 1 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 12 23 24 Description not connected data input/output (A port) ground (0 V) output enable input (active LOW) positive supply voltage
22, 21, 20, 19, 18, 17, 16, 15, 14, 13 data input/output (B port)
6. Functional description
Table 3. Input OE L H
[1]
Function selection[1] Input/output An, Bn An = Bn Z
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
CBTD3861
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Product data sheet
Rev. 1 -- 19 August 2010
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NXP Semiconductors
CBTD3861
10-bit level shifting bus switch with output enable
7. Limiting values
Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).[1] Tamb = -40 C to +85 C, unless otherwise specified. Symbol VCC VI IO IIK Tstg
[1]
Parameter supply voltage input voltage output current input clamping current storage temperature
Conditions
[2]
Min -0.5 -0.5 -50 -65
Max +7.0 +7.0 128 +150
Unit V V mA mA C
VO < 0 V VI/O = 0 V
Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under Section 8. is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
[2]
8. Recommended operating conditions
Table 5. Operating conditions All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Symbol VCC VIH VIL Tamb Parameter supply voltage HIGH-state input voltage LOW-state input voltage ambient temperature operating in free air Conditions Min 4.5 2.0 -40 Typ Max 5.5 0.8 +85 Unit V V V C
9. Static characteristics
Table 6. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol VIK II ICC ICC Vpass CI Cio(off) Parameter input clamping voltage input leakage current supply current additional supply current pass voltage input capacitance off-state input/output capacitance Conditions VCC = 4.5 V; II = -18 mA VCC = 5.5 V; VI = GND or 5.5 V VCC = 5.5 V; IO = 0 mA; VI = VCC or GND per input pin; VCC = 5.5 V; one input at 3.4 V, other inputs at VCC or GND see Figure 5 to Figure 9 control pins; VI = 3 V or 0 V port off; VI = 3 V or 0 V; OE = VCC
[2]
Tamb = -40 C to +85 C Min Typ[1] 2.5 4.0 Max -1.2 1 1.5 2.5 -
Unit V A mA mA V pF pF
CBTD3861
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Product data sheet
Rev. 1 -- 19 August 2010
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CBTD3861
10-bit level shifting bus switch with output enable
Table 6. Static characteristics ...continued Voltages are referenced to GND (ground = 0 V). Symbol RON Parameter ON resistance Conditions VCC = 4.5 V; VI = 0 V; II = 64 mA VCC = 4.5 V; VI = 0 V; II = 30 mA VCC = 4.5 V; VI = 2.4 V; II = -15 mA
[1] [2] [3] All typical values are at VCC = 5 V, Tamb = 25 C. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. Measured by the voltage drop between the nAn and the nBn terminals at the indicated current through the switch. ON resistance is determined by the lowest voltage of the two (nAn or nBn) terminals.
[3] [3] [3]
Tamb = -40 C to +85 C Min Typ[1] 5 5 17 Max 7 7 50
Unit
9.1 Typical pass voltage graphs
3.6 Vpass (V) 3.2
(1) 001aak834
3.6 Vpass (V)
(1)
001aak835
3.2
(2) (2) (3)
2.8
(4)
2.8
(3) (4)
2.4
2.4
2.0 4.4
4.8
5.2 VCC (V)
5.6
2.0 4.4
4.8
5.2 VCC (V)
5.6
(1) ISW = 100 A (2) ISW = 6 mA (3) ISW =12 mA (4) ISW = 24 mA
(1) ISW = 100 A (2) ISW = 6 mA (3) ISW =12 mA (4) ISW = 24 mA
Fig 5.
Pass voltage versus supply voltage; Tamb = 85 C (typical)
Fig 6.
Pass voltage versus supply voltage; Tamb = 70 C (typical)
CBTD3861
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(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 1 -- 19 August 2010
5 of 16
NXP Semiconductors
CBTD3861
10-bit level shifting bus switch with output enable
3.6 Vpass (V) 3.2
(2)
001aak836
3.6 Vpass (V) 3.2
(1)
001aak837
(1)
(2) (3) (3)
2.8
(4)
2.8
(4)
2.4
2.4
2.0 4.4
4.8
5.2 VCC (V)
5.6
2.0 4.4
4.8
5.2 VCC (V)
5.6
(1) ISW = 100 A (2) ISW = 6 mA (3) ISW =12 mA (4) ISW = 24 mA
(1) ISW = 100 A (2) ISW = 6 mA (3) ISW =12 mA (4) ISW = 24 mA
Fig 7.
Pass voltage versus supply voltage; Tamb = 25 C (typical)
Fig 8.
Pass voltage versus supply voltage; Tamb = 0 C (typical)
3.6 Vpass (V) 3.2
(1)
001aak838
(2)
2.8
(3) (4)
2.4
2.0 4.4
4.8
5.2 VCC (V)
5.6
(1) ISW = 100 A (2) ISW = 6 mA (3) ISW =12 mA (4) ISW = 24 mA
Fig 9.
Pass voltage versus supply voltage; Tamb = -40 C (typical)
CBTD3861
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(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 1 -- 19 August 2010
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CBTD3861
10-bit level shifting bus switch with output enable
10. Dynamic characteristics
Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 12. Symbol Parameter tpd ten tdis propagation delay enable time disable time Conditions An, Bn to Bn, An; see Figure 10 VCC = 5.0 V 0.5 V OE to An or Bn; see Figure 11 VCC = 5.0 V 0.5 V OE to An or Bn; see Figure 11 VCC = 5.0 V 0.5 V
[1] [2]
[2] [2] [1][2]
Tamb = -40 C to +85 C Min 1.8 1.0 Typ 4.3 3.0 Max 0.25 10.0 6.0
Unit
ns ns ns
The propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ.
11. Waveforms
VI An, Bn input GND tPHL VOH Bn, An output VOL VM
001aam475
VM
tPLH
Measurement points are given in Table 8. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 10. The data input (An, Bn) to output (Bn, An) propagation delay times
CBTD3861
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(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 1 -- 19 August 2010
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CBTD3861
10-bit level shifting bus switch with output enable
VI OE input GND tPLZ 3.5 V output LOW-to-OFF OFF-to-LOW VOL tPHZ VOH output HIGH-to-OFF OFF-to-HIGH GND outputs enabled outputs disabled outputs enabled
001aam476
VM
tPZL
VM VX tPZH VY VM
Measurement points are given in Table 8. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 11. Enable and disable times Table 8. VCC VCC = 5.0 V 0.5 V Measurement points Input VI GND to 3.0 V VM 1.5 V Output VM 1.5 V VX VOL + 0.3 V VY VOH - 0.3 V
Supply voltage
CBTD3861
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(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 1 -- 19 August 2010
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NXP Semiconductors
CBTD3861
10-bit level shifting bus switch with output enable
12. Test information
tW 90 % VM 10 % tf tr VI positive pulse 0V 10 % tW
VEXT VCC VI VO
RL
VI negative pulse 0V
VM
tr tf 90 % VM VM
G
RT
DUT
CL RL
001aae331
Test data is given in Table 9. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz; Zo = 50 . The outputs are measured one at a time with one transition per measurement. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times.
Fig 12. Test circuit for measuring switching times Table 9. Test data Input VI VCC = 5.0 V 0.5 V tr, tf GND to 3.0 V 2.5 ns Load CL 50 pF RL 500 VEXT tPLH, tPHL open tPLZ, tPZL 7.0 V tPHZ, tPZH open
Supply voltage
CBTD3861
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 1 -- 19 August 2010
9 of 16
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CBTD3861
10-bit level shifting bus switch with output enable
13. Package outline
SSOP24: plastic shrink small outline package; 24 leads; body width 3.9 mm; lead pitch 0.635 mm SOT556-1
D
E
A
X
c y HE vM A
Z
24 13
A2 A1 (A 3) Lp L
1 12
A
detail X wM
e
bp
0
2.5 scale
5 mm
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) UNIT mm inches A max. 1.73 0.068 A1 0.25 0.10 A2 1.55 1.40 A3 0.25 0.01 bp 0.31 0.20 c 0.25 0.18 D(1) 8.8 8.6 E(1) 4.0 3.8 e 0.635 HE 6.2 5.8 L 1 Lp 0.89 0.41 v 0.25 0.01 w 0.18 y 0.1 Z(1) 1.05 0.66 0.040 0.026 8 o 0 8o o 0
o
0.0098 0.061 0.0040 0.055
0.012 0.0098 0.344 0.157 0.244 0.035 0.025 0.041 0.008 0.0075 0.337 0.150 0.228 0.016
0.007 0.004
Note 1. Plastic or metal protrusions of 0.2 mm (0.008 inch) maximum per side are not included. OUTLINE VERSION SOT556-1 REFERENCES IEC JEDEC MO-137 JEITA EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-18
Fig 13. Package outline SOT556-1 (SSOP24)
CBTD3861 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 1 -- 19 August 2010
10 of 16
NXP Semiconductors
CBTD3861
10-bit level shifting bus switch with output enable
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm
SOT355-1
D
E
A
X
c y HE vMA
Z
24
13
Q A2 pin 1 index A1 (A 3) A
Lp L
1
e bp
12
wM detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 7.9 7.7 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.5 0.2 8o 0o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT355-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19
Fig 14. Package outline SOT355-1 (TSSOP24)
CBTD3861 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 1 -- 19 August 2010
11 of 16
NXP Semiconductors
CBTD3861
10-bit level shifting bus switch with output enable
DHVQFN24: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 24 terminals; body 3.5 x 5.5 x 0.85 mm
SOT815-1
D
B
A
E
A
A1 c
detail X terminal 1 index area C terminal 1 index area 2 L 12 e1 e b 11 vMCAB wM C y1 C y
1
Eh
e2
24 13
23 Dh 0
14 X 2.5 scale 5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. 1 A1 0.05 0.00 b 0.30 0.18 c 0.2 D (1) 5.6 5.4 Dh 4.25 3.95 E (1) 3.6 3.4 Eh 2.25 1.95 e 0.5 e1 4.5 e2 1.5 L 0.5 0.3 v 0.1 w 0.05 y 0.05 y1 0.1
Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE VERSION SOT815-1 REFERENCES IEC --JEDEC --JEITA --EUROPEAN PROJECTION
ISSUE DATE 03-04-29
Fig 15. Package outline SOT815-1 (DHVQFN24)
CBTD3861 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 1 -- 19 August 2010
12 of 16
NXP Semiconductors
CBTD3861
10-bit level shifting bus switch with output enable
14. Abbreviations
Table 10. Acronym CDM ESD HBM PRR TTL Abbreviations Description Charged Device Model ElectroStatic Discharge Human Body Model Pulse Rate Repetition Transistor-Transistor Logic
15. Revision history
Table 11. Revision history Release date 20100819 Data sheet status Product data sheet Change notice Supersedes Document ID CBTD3861 v.1
CBTD3861
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 1 -- 19 August 2010
13 of 16
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CBTD3861
10-bit level shifting bus switch with output enable
16. Legal information
16.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification -- The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.
suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer's sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer's applications and products planned, as well as for the planned application and use of customer's third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer's applications or products, or the application or use by customer's third party customer(s). Customer is responsible for doing all necessary testing for the customer's applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer's third party customer(s). NXP does not accept any liability in this respect. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer's general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
16.3 Disclaimers
Limited warranty and liability -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors' aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications -- This NXP Semiconductors product has been qualified for use in automotive applications. The product is not designed, authorized or warranted to be
CBTD3861
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 1 -- 19 August 2010
14 of 16
NXP Semiconductors
CBTD3861
10-bit level shifting bus switch with output enable
Export control -- This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
17. Contact information
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
CBTD3861
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 1 -- 19 August 2010
15 of 16
NXP Semiconductors
CBTD3861
10-bit level shifting bus switch with output enable
18. Contents
1 2 3 4 5 5.1 5.2 6 7 8 9 9.1 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Typical pass voltage graphs . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 13 Legal information. . . . . . . . . . . . . . . . . . . . . . . 14 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Contact information. . . . . . . . . . . . . . . . . . . . . 15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 19 August 2010 Document identifier: CBTD3861


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